team

Sayak Dutta Gupta

Assistant Professor

Ph.D. from IISc Bangalore in 2022 

M. Tech from IIEST Shibpur in 2016 

B. Tech from West Bengal University of Technology in 2014 

044-2257 4483

sayak@ee.iitm.ac.in

CSD318, Department of Electrical Engineering, IIT Madras

  • Sayak Dutta Gupta is currently an Assistant Professor in the Department of Electrical Engineering at Indian Institute of Technology Madras. Before joining IIT Madras in the November of 2023, I was working at Infineon Technologies Austria as a staff engineer. During my 1-year tenure at Infineon, I was working on the development of their next generation Gallium Nitride (GaN) based discrete products.

    Prior to joining Infineon, I was pursuing my doctoral studies at IISc Bangalore and obtained my Ph.D. degree in 2022. I also worked as a project staff at IISc Bangalore for a year in 2016 before joining the doctoral programme. In my 6 years at IISc Bangalore, I worked extensively in the area of technology development and reliability physics of GaN-based devices. The work also led to the indigenous development of India’s first enhancement-mode GaN-based High Electron Mobility Transistor (HEMT) (Read the article here).

    I am currently a member of the Centre for NEMS and Nanophotonics (CNNP) and Wide Bandgap Group at IIT Madras.

  • Device Design, Technology Development, Device Modelling and Reliability Physics Investigations of next-generation and future semiconductor devices, like
    a) Power devices on wide bandgap semiconductors (GaN, Ga2O3, SiC)
    b) Microwave devices on III-V and 2-D materials.

  • ‘The Murthy Govindaraju Research Endowment Award in Power Electronics’ by IISc Bangalore, for excellence in academic research, to materially advance the efficiency, size and performance of Power Electronics.
  • Best Presentation in Session Award at EECS Research Students Symposium 2021, IISc Bangalore.
  • International Travel Fellowship by SERB, Department of Science and Technology, India in 2020.
  • INSPIRE Fellowship by Department of Science and Technology, Government of India for pursuing Ph.D., Jan 2018.
  • Prof. A. K. Seal Gold Medal for 1st in Regular Master of Technology Examination, March 2017.
  • Institute Silver Medal for 1st in Master of Technology in Materials Engineering, March 2017.
  • Aditya Birla Group Chairman’s Award for Scholastic Achievement for securing overall 3rd position in all Aditya Birla Group Schools of India, during Class 10 board Examination, 2008.

    Current Courses

  • Compound Semiconductor Devices (Graduate)

Journals

  • R. Roy Chaudhuri, A. Gupta, V. Joshi, R. R. Malik, Sayak Dutta Gupta and M. Shrivastava, "Physical Insights Into Nano-Second Time Scale Cyclic Stress Induced Dynamic Ron Behavior in AlGaN/GaN HEMTs—Part I," in IEEE Transactions on Electron Devices, vol. 70, no. 12, pp. 6175-6182, Dec. 2023, doi: 10.1109/TED.2023.3323439.
  • R. R. Chaudhuri, A. Gupta, V. Joshi, R. R. Malik, Sayak Dutta Gupta and M. Shrivastava, "Impact of Channel Electric Field Profile Evolution on Nanosecond Timescale Cyclic Stress-Induced Dynamic RON Behavior in AlGaN/GaN HEMTs—Part II," in IEEE Transactions on Electron Devices, vol. 70, no. 12, pp. 6183-6189, Dec. 2023, doi: 10.1109/TED.2023.3300652.
  • V. Joshi, R. Roy Chaudhuri, Sayak Dutta Gupta and M. Shrivastava, "Impact of Buffer Capacitance-Induced Trap Charging on Electric Field Distribution and Breakdown Voltage of AlGaN/GaN HEMTs on Carbon-Doped GaN-on-Si," in IEEE Transactions on Electron Devices, vol. 70, no. 12, pp. 6465-6472, Dec. 2023, doi: 10.1109/TED.2023.3321281.
  • R. R. Malik, V. Joshi, R. R. Chaudhuri, Sayak Dutta Gupta and M. Shrivastava, "Reverse Bias Stress-Induced Turn-On Voltage Shift in Recessed AlGaN/GaN Schottky Barrier Diodes," in IEEE Transactions on Electron Devices, vol. 70, no. 12, pp. 6211-6216, Dec. 2023, doi: 10.1109/TED.2023.3321864.
  • V. Joshi, R. Roy Chaudhuri, Sayak Dutta Gupta and M. Shrivastava, "Physical Insights Into Electron Trapping Mechanism in the Carbon-Doped GaN Buffer in AlGaN/GaN HEMTs and Its Impact on Dynamic On-Resistance," in IEEE Transactions on Electron Devices, vol. 70, no. 6, pp. 3011-3018, June 2023, doi: 10.1109/TED.2023.3269409.
  • R. Roy Chaudhuri, V. Joshi, Sayak Dutta Gupta and M. Shrivastava, "Observations and Physical Insights Into Time-Dependent Hot Electron Current Confinement in AlGaN/GaN HEMTs on C-Doped GaN Buffer," in IEEE Transactions on Electron Devices, vol. 69, no. 12, pp. 6602-6609, Dec. 2022, doi: 10.1109/TED.2022.3213627.
  • Sayak Dutta Gupta, V. Joshi, R. R. Chaudhuri and M. Shrivastava, "Unique Role of Hot-Electron Induced Self-Heating in Determining Gate-Stack Dependent Dynamic RON of AlGaN/GaN HEMTs Under Semi-on State," in IEEE Transactions on Electron Devices, vol. 69, no. 12, pp. 6934-6939, Dec. 2022, doi: 10.1109/TED.2022.3212327.
  • V. Joshi, Sayak Dutta Gupta, R. R. Chaudhuri and M. Shrivastava, "Interplay of Device Design and Carbon-Doped GaN Buffer Parameters in Determining Dynamic in AlGaN/GaN HEMTs," in IEEE Transactions on Electron Devices, vol. 69, no. 11, pp. 6035-6042, Nov. 2022, doi: 10.1109/TED.2022.3209635.
  • Sayak Dutta Gupta, V. Joshi, R. Roy Chaudhuri and M. Shrivastava, “Unique Gate Bias Dependence of Dynamic ON Resistance in MIS-Gated AlGaN/GaN HEMTs and Its Dependence on Gate Control over the 2-DEG,” in IEEE Transactions on Electron Devices, vol. 69, no. 3, pp. 1608-1611, March 2022, doi: 10.1109/TED.2022.3144378.
  • Sayak Dutta Gupta, V. Joshi, R. Roy Chaudhuri and M. Shrivastava, “Part I: Physical Insights Into Dynamic RON Behavior and a Unique Time-Dependent Critical Stress Voltage in AlGaN/GaN HEMTs,” in IEEE Transactions on Electron Devices, vol. 68, no. 11, pp. 5720-5727, Nov. 2021, doi: 10.1109/TED.2021.3109847.
  • Sayak Dutta Gupta, V. Joshi, R. Roy Chaudhuri and M. Shrivastava, “Novel Surface Passivation Scheme by Using p-Type AlTiO to Mitigate Dynamic ON Resistance Behavior in AlGaN/GaN HEMTs—Part II,” in IEEE Transactions on Electron Devices, vol. 68, no. 11, pp. 5728-5735, Nov. 2021, doi: 10.1109/TED.2021.3064531.
  • Sayak Dutta Gupta, V. Joshi, R. Roy Chaudhuri and M. Shrivastava, “Observations regarding deep-level states causing p-type doping in AlTiO gate and positive threshold voltage shift in AlGaN/GaN high electron mobility transistors”, in Journal of Applied Physics, vol. 130, pp. 015701, 2021, doi: 10.1063/5.0053982.
  • R. Roy Chaudhuri, V. Joshi, Sayak Dutta Gupta and M. Shrivastava, “On the Channel Hot-Electron’s Interaction With C-Doped GaN Buffer and Resultant Gate Degradation in AlGaN/GaN HEMTs,” in IEEE Transactions on Electron Devices, vol. 68, no. 10, pp. 4869-4876, Oct. 2021, doi: 10.1109/TED.2021.3102469.
  • V. Joshi, Sayak Dutta Gupta, R. Roy Chaudhuri and M. Shrivastava, “Part-I: Physical Insights into the Impact of Surface Traps on Breakdown Characteristics of AlGaN/GaN HEMTs”, in IEEE Transactions on Electron Devices, vol. 68, no. 1, pp. 72-79, Jan. 2021, doi: 10.1109/TED.2020.3034561.
  • V. Joshi, Sayak Dutta Gupta, R. Roy Chaudhuri and M. Shrivastava, “Part-II: Interplay between Surface and Buffer Traps in Governing Breakdown Characteristics of AlGaN/GaN HEMTs”, in IEEE Transactions on Electron Devices, vol. 68, no. 1, pp. 80-87, Jan. 2021, doi: 10.1109/TED.2020.3034562.
  • B. Shankar, S. Shikha, A. Singh, J. Kumar, A. Soni, Sayak Dutta Gupta, S. Raghavan and M. Shrivastava, “Time Dependent Shift in SOA Boundary and Early Breakdown of Epi-Stack in AlGaN/ GaN HEMTs Under Fast Cyclic Transient Stress”, IEEE Transactions on Device and Materials Reliability, vol. 20, no. 3, pp. 562-569, 2020, doi: 10.1109/TDMR.2020.3007128.
  • B. Shankar, Sayak Dutta Gupta, A. Soni, S. Raghavan and M. Shrivastava, “ESD Behavior of AlGaN/GaN Schottky Diodes”, IEEE Transactions on Device and Materials Reliability, vol. 19, no. 2, pp. 437-444, 2019, doi: 10.1109/TDMR.2019.2916846.
  • Sayak Dutta Gupta, A. Soni, V. Joshi, J. Kumar, R. Sengupta, H. Khand, B. Shankar, N. Mohan, S. Raghavan, N. Bhat and M. Shrivastava, “Positive Threshold Voltage Shift in AlGaN/GaN HEMTs and E-Mode Operation By AlxTi1-xO Based Gate Stack Engineering”, in IEEE Transactions on Electron Devices, vol. 66, no. 6, pp. 2544-2550, June 2019, doi: 10.1109/TED.2019.2908960.

Conference Proceedings

  • V. Joshi, Sayak Dutta Gupta, R. R. Chaudhuri and M. Shrivastava, "Unique Dependence of the Breakdown Behavior of Normally-OFF Cascode AlGaN/GaN HEMTs on Carrier Transport Through the Carbon-Doped GaN Buffer," 2023 IEEE International Reliability Physics Symposium (IRPS), Monterey, CA, USA, 2023, pp. 1-4, doi: 10.1109/IRPS48203.2023.10118195.
  • R. R. Chaudhuri, V. Joshi, A. Gupta, T. Joshi, R. R. Malik, M. A. Mir, Sayak Dutta Gupta and M. Shrivastava, "Unique Lattice Temperature Dependent Evolution of Hot Electron Distribution in GaN HEMTs on C-doped GaN Buffer and its Reliability Consequences," 2023 IEEE International Reliability Physics Symposium (IRPS), Monterey, CA, USA, 2023, pp. 1-5, doi: 10.1109/IRPS48203.2023.10118255.
  • Sayak Dutta Gupta, V. Joshi, R. Roy Chaudhuri, A. K. Singh, S. Guha and M. Shrivastava, “On the Root Cause of Dynamic ON Resistance Behavior in AlGaN/GaN HEMTs," 2020 IEEE International Reliability Physics Symposium (IRPS), Dallas, TX, USA, 2020, pp. 1-4, doi: 10.1109/IRPS45951.2020.9128226.
  • R. R. Chaudhuri, V. Joshi, Sayak Dutta Gupta and M. Shrivastava, “Interaction of hot electrons with Carbon doped GaN buffer in AlGaN/GaN HEMTs: Correlation with lateral electric field and device failure,” 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Vienna, Austria, 2020, pp. 341-344, doi: 10.1109/ISPSD46842.2020.9170160.
  • Sayak Dutta Gupta, V. Joshi, B. Shankar, S. Shikha, S. Raghavan and M. Shrivastava, "UV-Assisted Probing of Deep-Level Interface Traps in GaN MISHEMTs and Their Role in Threshold Voltage & Gate Leakage Instabilities," 2019 IEEE IRPS, Monterey, CA, USA, 2019, pp. 1-5, doi: 10.1109/IRPS.2019. 8720595.
  • B. Shankar, A. Soni, Sayak Dutta Gupta, S. Shikha, S. Singh, S. Raghavan and M. Shrivastava, “Time Dependent Early breakdown of AIGaN/GaN Epi Stacks and Shift in SOA Boundary of HEMTs Under Fast Cyclic Transient Stress," 2018 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, 2018, pp. 34.6.1-34.6.4, doi: 10.1109/IEDM.2018.8614690.
  • B. Shankar, A. Soni, Sayak Dutta Gupta, R. Sengupta, H. Khand, N. Mohan, S. Raghavan and M. Shrivastava, “On the Trap Assisted Stress Induced Safe Operating Area Limits of AlGaN/GaN HEMTs”, in 2018 IEEE International Reliability Physics Symposium (IRPS), 2018, 4E.4-1-4E.4-5, doi: 10.1109/IRPS.2018.8353596.
  • B. Shankar, A. Soni, Sayak Dutta Gupta and M. Shrivastava, "Safe Operating Area (SOA) reliability of Polarization Super Junction (PSJ) GaN FETs," in 2018 IEEE International Reliability Physics Symposium (IRPS), Burlingame, CA, 2018, pp. 4E.3-1-4E.3-4, doi: 10.1109/IRPS.2018.8353595.
  • B. Shankar, R. Singh, R. Sengupta, H. Khand, A. Soni, Sayak Dutta Gupta, S. Raghavan, H. Gossner and M. Shrivastava, “Trap Assisted Stress Induced ESD Reliability of GaN Schottky Diodes”, in 40th Electrical Overstress/ Electrostatic Discharge Symposium (EOS/ ESD), 2018, pp. 1-6, doi: 10.23919/EOS/ESD.2018.8509745.
  • B. Shankar, A. Soni, Sayak Dutta Gupta, R. Sengupta, H. Khand, N. Mohan, S. Raghavan, N. Bhat and M. Shrivastava, ‘Design and Reliability of GaN Power HEMT Technology (Invited)’, ECS Meeting Abstracts, vol. MA2018-02, no. 16, p. 713, 2018. [Online]: http://ma.ecsdl.org/content/MA2018-02/16/713.abstract
  • B. Shankar, R. Sengupta, Sayak Dutta Gupta, A. Soni, N. Mohan, N. Bhat, S. Raghavan and M. Shrivastava, "On the ESD behavior of AlGaN/GaN schottky diodes and trap assisted failure mechanism," 2017 39th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), Tucson, AZ, 2017, pp. 1-6, doi: 10.23919/EOSESD.2017.8073423.

Patents

  • Mayank Shrivastava, Sayak Dutta Gupta, Ankit Soni, Srinivasan Raghavan and Navakanta Bhat, “Enhancement Mode High Electron Mobility (HEMT) Transistor”, United States Patent No. US 10,840,348 B2, Date of Patent: Nov. 17, 2020. (Granted) [Also granted in India - Indian Patent No.: 386363, Application No: 201741030570]

Books Authored

  • Mallar Ray, Sayak Dutta Gupta and Atrayee Hazra, “Chapter 09: Silicon based core-shell nanostructures”, Book: Silicon Nanomaterials Sourcebook: Hybrid Materials, Arrays, Networks, and Devices, Volume Two, Editor: Klaus D. Sattler, ISBN: 9781498763783 - CAT# K28987, Publisher: Taylor & Francis Publisher.

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